Java Forum / Virtual Machine / August 2005
IBM and The United States Department of Defense
cpu16x1832@wmconnect.com - 21 Aug 2005 16:53 GMT Simply, this functional design specification url adequately explains , ( URL: http://groups.google.com/group/comp.lang.java.machine/msg/b400d03ddc0f5a4f?hl=en)
to IBM, Intel, Microsoft ( Russia!, China!!, Bill Gates!!!) how to build the most powerful computer chip on earth, TODAY!
How many more years will IBM US Defense Department wait for Intel's Microsoft super chip?
( Bill Gates and I chatted 1996 about SMP MPP multiple stack virtual machine architecture!)
( BTW. don't bother to send any valuable ideas to president@whitehouse.com, Bill Gates first replied to the idea six weeks later, ex-President Clinton is a jerk!)
Andrew Thompson - 21 Aug 2005 20:23 GMT > Simply, this functional design specification url adequately explains , ...
> to IBM, Intel, Microsoft ( Russia!, China!!, Bill Gates!!!) how to > build the most powerful computer chip on earth, TODAY! Oh right, the post with this classic line.. ..
> 1c) !!! TIMES FOUR FOR FAULT TOLERANT ( SUPER COOLED?) VERSION OPTION !!! ..
Shouting, exclamation marks at the beginning and end of the statement (in case the reader missed it's Earth shattering significance) vague waving about of hands, and a (questioned) mention of super cooling.
Why don't you get back to us when this chip reaches the production line, ..ehh?
[ Note: Follow-Ups to this post set to comp.lang.java.machine ]
 Signature Andrew Thompson physci.org 1point1c.org javasaver.com lensescapes.com athompson.info "Your eyes, no surprise, are open wide.." Divinyls 'Good Die Young'
anonymous - 22 Aug 2005 02:56 GMT Hi!
> > Simply, this functional design specification url adequately explains , > ... [quoted text clipped - 10 lines] > shattering significance) vague waving about of hands, > and a (questioned) mention of super cooling. Ya, OK, a bit messy of a description, however, simply, FAULT TOLERANCE , ( or /fault tolerance/ if you syntatically prefer, ) was added by DOD? ( using eavsdroppers feedbacking thru FM radio) a requirement in 1998.
The fault tolerant circuit is made simple and the method robust, quad processors acting as a single processor, but implies four times the amount of memory, with stack code the code is most efficient but we still need to operate upon possibly a large knowledge base of data ( green, red, no-signal)
( the 1c) /optional/, is mostly only of /immediate/ significance to Intel Research, /and/, yes, a processor & memory packed in an aluminum tube for nitrogen submersion is an option, I have previously considered, for anyone /who may efford to develop chips/. ( filled with a jell to remove heat from processor(s) to the aluminum tube case, live plugin into a nitrogen submerged live electronic socket is an extreamly delicate trick and requires much mechanical robotic precision)
> Why don't you get back to us when this chip reaches the > production line, ..ehh? Hmm, interesting question. I once earned, twenty five years ago, more money than I do today, but fifteen years ago I was sort of a top-guns of programming club member, Geoff Cortright hired me for Bill Gates. In 1996, I wrote an email to ex-President Clinton about SMP MPP FORTH ( stack machine architecture), but I got a reply back from Bill Gates before I ever heard anything from Washington, ( ex-President Clinton is a jerk)
What would my life be like today if Washington would have simply put forward the question from Department of Defense to IBM ( instead of the other way around ) From Department of Defense, "Is SMP MPP FORTH the correct formula for most efficient silicon fabrication?" To: IBM Defense Systems. Oh Boy would my life be wonderful today!
HOWEVER, today I earn very little money ( am allowed), less than a fifth of my past earnings, barely enough for my own food, shelter and clother, and, as I have said before, less than I earned TWENTY FIVE years ago!
I suggest the answer you seek is, "People need money to make money.", I can't force IBM or Washington, for that matter, to serve the public interest. I guess you'll need to complete the remaining work. ( which, at this point, nine years down the road from my Washington communications, mostly means fabrication facilities)
If you understand Mr. Moore's C18/X18 and the significance of 25X then you are doing well. Do you know why a 1 MHz 6502 processor out-performed, in some cases, a 4.77 MHz 8086? ( Someday, if you study hard, you will know, Intel's deep dark secret)
Regards,
mawcowboy
cpu16x1832@wmconnect.com - 22 Aug 2005 03:12 GMT Hi!
> > Simply, this functional design specification url adequately explains , > ... [quoted text clipped - 10 lines] > shattering significance) vague waving about of hands, > and a (questioned) mention of super cooling. Ya, OK, a bit messy of a description, however, simply, FAULT TOLERANCE , ( or /fault tolerance/ if you syntatically prefer, ) was added by DOD? ( using eavsdroppers feedbacking thru FM radio) a requirement in 1998.
The fault tolerant circuit is made simple and the method robust, quad processors acting as a single processor, but implies four times the amount of memory, with stack code the code is most efficient but we still need to operate upon possibly a large knowledge base of data ( green, red, no-signal)
( the 1c) /optional/, is mostly only of /immediate/ significance to Intel Research, /and/, yes, a processor & memory packed in an aluminum tube for nitrogen submersion is an option, I have previously considered, for anyone /who may efford to develop chips/. ( filled with a jell to remove heat from processor(s) to the aluminum tube case, live plugin into a nitrogen submerged live electronic socket is an extreamly delicate trick and requires much mechanical robotic precision)
> Why don't you get back to us when this chip reaches the > production line, ..ehh? Hmm, interesting question. I once earned, twenty five years ago, more money than I do today, but fifteen years ago I was sort of a top-guns of programming club member, Geoff Cortright hired me for Bill Gates. In 1996, I wrote an email to ex-President Clinton about SMP MPP FORTH ( stack machine architecture), but I got a reply back from Bill Gates before I ever heard anything from Washington, ( ex-President Clinton is a jerk)
What would my life be like today if Washington would have simply put forward the question from Department of Defense to IBM ( instead of the other way around ) From Department of Defense, "Is SMP MPP FORTH the correct formula for most efficient silicon fabrication?" To: IBM Defense Systems. Oh Boy would my life be wonderful today!
HOWEVER, today I earn very little money ( am allowed), less than a fifth of my past earnings, barely enough for my own food, shelter and clother, and, as I have said before, less than I earned TWENTY FIVE years ago!
I suggest the answer you seek is, "People need money to make money.", I can't force IBM or Washington, for that matter, to serve the public interest. I guess you'll need to complete the remaining work. ( which, at this point, nine years down the road from my Washington communications, mostly means fabrication facilities)
If you understand Mr. Moore's C18/X18 and the significance of 25X then you are doing well.
Regards,
mawcowboy
cpu16x1832@wmconnect.com - 22 Aug 2005 03:18 GMT Hi!
> > Simply, this functional design specification url adequately explains , > ... [quoted text clipped - 10 lines] > shattering significance) vague waving about of hands, > and a (questioned) mention of super cooling. Ya, OK, a bit messy of a description, however, simply, FAULT TOLERANCE , ( or /fault tolerance/ if you syntatically prefer, ) was added by DOD? ( using eavsdroppers feedbacking thru FM radio) a requirement in 1998.
The fault tolerant circuit is made simple and the method robust, quad processors acting as a single processor, but implies four times the amount of memory, with stack code the code is most efficient but we still need to operate upon possibly a large knowledge base of data ( green, red, no-signal)
( the 1c) /optional/, is mostly only of /immediate/ significance to Intel Research, /and/, yes, a processor & memory packed in an aluminum tube for nitrogen submersion is an option, I have previously considered, for anyone /who may efford to develop chips/. ( filled with a jell to remove heat from processor(s) to the aluminum tube case, plugging a CPU tube into a nitrogen submerged live electronic socket is an extreamly delicate trick and requires much mechanical robotic accuracy)
> Why don't you get back to us when this chip reaches the > production line, ..ehh? Hmm, interesting question. I once earned, twenty five years ago, more money than I do today, but fifteen years ago I was sort of a top-guns of programming club member, Geoff Cortright hired me for Bill Gates. In 1996, I wrote an email to ex-President Clinton about SMP MPP FORTH ( stack machine architecture), but I got a reply back from Bill Gates before I ever heard anything from Washington, ( ex-President Clinton is a jerk)
What would my life be like today if Washington would have simply put forward the question from Department of Defense to IBM ( instead of the other way around ) From Department of Defense, "Is SMP MPP FORTH the correct formula for most efficient silicon fabrication?" To: IBM Defense Systems. Oh Boy would my life be wonderful today!
HOWEVER, today I earn very little money ( am allowed), less than a fifth of my past earnings, barely enough for my own food, shelter and clother, and, as I have said before, less than I earned TWENTY FIVE years ago!
I suggest the answer you seek is, "People need money to make money.", I can't force IBM or Washington, for that matter, to serve the public interest. I guess you'll need to complete the remaining work. ( which, at this point, nine years down the road from my Washington communications, mostly means fabrication facilities)
If you understand Mr. Moore's C18/X18 and the significance of 25X then you are doing well.
Regards,
mawcowboy
cpu16x1832@wmconnect.com - 27 Aug 2005 16:59 GMT Hi!
> > Simply, this functional design specification url adequately explains , > ... [quoted text clipped - 10 lines] > shattering significance) vague waving about of hands, > and a (questioned) mention of super cooling. Ya, OK, a bit messy of a description, however, simply, fault tolerant circuit is made simple and the method robust, quad processors acting as a single processor, but implies four times the amount of memory, with stack code the code is most efficient but we still need to operate
upon possibly a large knowledge base of data ( green, red, no-signal)
( the 1c) /optional/, is mostly only of /immediate/ significance to Intel Research, /and/, yes, a processor & memory packed in an aluminum tube for nitrogen submersion is an option, I have previously considered, for anyone /who may efford to develop chips/.
> Why don't you get back to us when this chip reaches the > production line, ..ehh? I suggest the answer you seek is, "People need money to make money.", I can't force IBM or Washington, for that matter, to serve the public interest. I guess you'll need to complete the remaining work. ( which, at this point, nine years down the road from my Washington communications, mostly means fabrication facilities)
If you understand Mr. Moore's C18/X18 and the significance of 25X then you are doing well.
Regards,
mawcowboy
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